-
Notifications
You must be signed in to change notification settings - Fork 174
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[WIP DNM] x86: build cpukinds from AMD CPUID leaf 0x80000026 #587
base: master
Are you sure you want to change the base?
Conversation
Use coretype to build "AMD-ECore" and "AMD-Pcore" kinds. Use power efficiency rankings to build kinds with native efficiencies. Signed-off-by: Brice Goglin <[email protected]>
PPR says it's in core level, which means we get the info from each thread? Signed-off-by: Brice Goglin <[email protected]>
@superm1 thanks to your CPUID dump in #690, I was able to verify that this code mostly works:
Does this CPU report EfficiencyRanking? I see 1 in EfficiencyRankingAvailable=1 in the first level but the ranking I read is 0 for all cores (that's why I have "efficiency -1" (unknown) above). Also, I am not sure I understand why AsymmetricTopology=1 only in the second level, EfficiencyRankingAvailable=1 only in first level (that one is documented), and HeterogeneousCores=1 in first 3 levels but not in 4th. |
printf(" EffRankingAvailable = %u\n", (eax & 0x20000000)>>29); | ||
printf(" CoreType = %u\n", (ebx >> 28) & 0xf); | ||
printf(" Model = %u\n", (ebx >> 24) & 0xf); | ||
printf(" EffRanking = %u\n", (ebx >> 16) & 0xff); |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Well, 0xf is 4 bits and 0xff is 8bits so all these look OK?
It's a topology indicator only. IE how they're grouped into larger units. It's meant to be used in conjunction with bit 30 and 29. IE if it's "1" then software is supposed to discover more details from 30 and 29.
I think APM explains that already.
It's a single socket system. |
@superm1 Is the "NativeModelId" CPUID info supposed to be the same for all cores on hybrid CPUs? I couldn't find the PPR for Strix Point. In the 19h family PPR, I see "Zen4" as the only NativeModelID possible value. Could we see some hybrid CPUs return something like "Zen5" and "Zen5c" for different cores? Or will they all return "Zen5" while CoreType is the only field distinguishing between Ecore and Pcore? By the way, in case you missed the question above: |
Yeah the publication of the docs sometimes lags a bit from the launch, sorry about that. I double checked though and
I guess not; but I'm not sure why. There are definitely rankings utilized from the CPPC MSRs. |
Use coretype to build "AMD-ECore" and "AMD-Pcore" kinds.
Use power efficiency rankings to build kinds with native efficiencies.
Only tested on manually modified CPUID values. Merge this once tested on an actual platform. Likely soon since some code (in AMD Pstate driver) is under review.