Repositories list

• XiangShan

  Public
  Open-source high-performance RISC-V processor

  chiselrisc-vmicroarchitecture

  Scala

  •

  Other

  •663•4.8k•59•40•Updated Nov 15, 2024Nov 15, 2024

• difftest

  Public
  Modern co-simulation framework for RISC-V CPUs

  C++

  •

  Mulan Permissive Software License, Version 2

  •66•117•5•6•Updated Nov 15, 2024Nov 15, 2024

• CoupledL2

  Public
  Open-source non-blocking L2 cache

  Scala

  •

  Other

  •20•33•0•5•Updated Nov 14, 2024Nov 14, 2024

• GEM5

  Public
  C++

  •

  BSD 3-Clause "New" or "Revised" License

  •24•66•12•3•Updated Nov 14, 2024Nov 14, 2024

• NEMU

  Public
  C

  •

  Other

  •92•236•32•17•Updated Nov 14, 2024Nov 14, 2024

• gos

  Public
  Assembly

  •2•3•0•0•Updated Nov 14, 2024Nov 14, 2024

• ready-to-run

  Public
  Shell

  •8•3•3•1•Updated Nov 14, 2024Nov 14, 2024

• CPU2006LiteWrapper

  Public
  Makefile

  •2•9•1•3•Updated Nov 14, 2024Nov 14, 2024

• riscv-isa-sim

  Public
  Spike, a RISC-V ISA Simulator

  C

  •

  Other

  •857•5•0•1•Updated Nov 13, 2024Nov 13, 2024

• rocket-chip

  Public
  Rocket Chip Generator

  Scala

  •

  Other

  •1.1k•4•0•0•Updated Nov 13, 2024Nov 13, 2024

• XiangShan-doc

  Public
  Documentation for XiangShan

  TeX

  •

  Creative Commons Attribution 4.0 International

  •134•351•6•3•Updated Nov 13, 2024Nov 13, 2024

• XiangShan-home

  Public
  Creative Commons Attribution 4.0 International

  •0•0•0•0•Updated Nov 12, 2024Nov 12, 2024

• nexus-am

  Public
  C

  •26•30•5•3•Updated Nov 8, 2024Nov 8, 2024

• OpenLLC

  Public
  Scala

  •

  Other

  •3•3•0•0•Updated Nov 8, 2024Nov 8, 2024

• nemu_board

  Public
  Shell

  •0•1•0•0•Updated Nov 8, 2024Nov 8, 2024

• riscv-rootfs

  Public
  C

  •10•1•0•2•Updated Nov 8, 2024Nov 8, 2024

• xfuzz

  Public
  Fuzzing General-Purpose Hardware Designs with Software Fuzzers

  Scala

  •

  Other

  •1•11•3•0•Updated Nov 8, 2024Nov 8, 2024

• tl-test-new

  Public
  The Unified TileLink Memory Subsystem Tester for XiangShan

  C++

  •

  Mulan Permissive Software License, Version 2

  •0•2•0•0•Updated Nov 7, 2024Nov 7, 2024

• CPU2017LiteWrapper

  Public
  Makefile

  •0•1•0•0•Updated Nov 7, 2024Nov 7, 2024

• YunSuan

  Public
  This repo includes XiangShan's function units

  Scala

  •

  Mulan Permissive Software License, Version 2

  •11•15•0•1•Updated Nov 6, 2024Nov 6, 2024

• Utility

  Public
  Scala

  •16•7•0•4•Updated Nov 6, 2024Nov 6, 2024

• env-scripts

  Public
  Scripts for XiangShan

  Verilog

  •14•11•0•1•Updated Nov 5, 2024Nov 5, 2024

• xs-env

  Public
  XiangShan Frontend Develop Environment

  Shell

  •

  Other

  •48•45•2•1•Updated Nov 2, 2024Nov 2, 2024

• OpenNCB

  Public
  Open-source Non-coherent CHI Bridge (CHI SN-F to AXI-4 bridge)

  buschiselchisel3+ 5socaxi4amba-axiamba-chiprotocol-bridge

  Scala

  •0•1•0•0•Updated Oct 31, 2024Oct 31, 2024

• riscv-tests

  Public
  C

  •

  Other

  •462•0•0•1•Updated Oct 30, 2024Oct 30, 2024

• riscv-pk

  Public
  RISC-V Proxy Kernel

  C

  •

  Other

  •308•0•0•0•Updated Oct 16, 2024Oct 16, 2024

• edk2-platforms

  Public
  EDK II sample platform branches and tags

  C

  •

  Other

  •492•0•0•0•Updated Oct 12, 2024Oct 12, 2024

• riscv-linux

  Public
  RISC-V Linux Port

  C

  •

  Other

  •209•3•0•0•Updated Oct 9, 2024Oct 9, 2024

• opensbi

  Public
  RISC-V Open Source Supervisor Binary Interface

  C

  •

  Other

  •510•1•0•0•Updated Oct 9, 2024Oct 9, 2024

• riscv-hyp-tests

  Public
  A bare-metal application to test specific features of the risc-v hypervisor extension

  C

  •

  GNU General Public License v3.0

  •21•1•0•0•Updated Sep 23, 2024Sep 23, 2024