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    • Security Test Benchmark for Computer Architectures
      C++
      Other
      31801Updated Nov 6, 2024Nov 6, 2024
    • FlexiCAS

      Public
      A Flexible Cache Architectural Simulator
      C++
      Other
      31140Updated Oct 31, 2024Oct 31, 2024
    • C
      Other
      3200Updated Oct 22, 2024Oct 22, 2024
    • A behavioural cache model for analysing the cache behaviour under side-channel attack.
      C++
      Other
      32200Updated Sep 23, 2024Sep 23, 2024
    • Scala
      BSD 3-Clause "New" or "Revised" License
      0900Updated Sep 18, 2024Sep 18, 2024
    • Run SPEC CPU 2017 on RISC-V Spike Simulator
      Makefile
      MIT License
      18000Updated Aug 30, 2024Aug 30, 2024
    • A wrapper for the SPEC CPU 2017 benchmark suite.
      Batchfile
      53000Updated Aug 15, 2024Aug 15, 2024
    • Collection of device models for spike
      C++
      5110Updated Jul 10, 2024Jul 10, 2024
    • Spike with a coherence supported cache model
      C
      Other
      11200Updated Jul 9, 2024Jul 9, 2024
    • .github

      Public
      0000Updated Jun 5, 2024Jun 5, 2024
    • 0000Updated Jun 5, 2024Jun 5, 2024
    • C
      MIT License
      0000Updated Feb 6, 2024Feb 6, 2024
    • ctpp

      Public
      C
      MIT License
      0200Updated Aug 1, 2023Aug 1, 2023
    • C
      Other
      0000Updated Feb 2, 2023Feb 2, 2023
    • Other
      0000Updated Jan 18, 2023Jan 18, 2023
    • C++
      Other
      2800Updated Dec 3, 2021Dec 3, 2021