Skip to content

paul-sanjoy/UpDownCounter_VHDL

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

4 Commits
 
 
 
 
 
 
 
 
 
 

Repository files navigation

Up Down Counter

An up-down counter is a combination of an up-counter and a down-counter. It can count in both directions, increasing as well as decreasing. The project is about a 4bit up-down counter which starts from '0' and counts up-to '15' and then counts down-to '0'.

Made with

Xilinx ISE 14.7 and programmed in VHDL.

Output

Output image

Contributing

Pull requests are welcome. For major changes, please open an issue first to discuss what you would like to change.

Please make sure to update tests as appropriate.

License

MIT

Releases

No releases published

Packages

No packages published

Languages