hal/imxrt117x: fix IOpad

- properly set ranges of registers configured differently
- add a way of setting ODE field in non-LPSR/SNVS GPIO registers
- set proper ranges for setting ODE field in LPSR, SNVS, and remaining GPIO registers

JIRA: RTOS-963

hal/armv7m/imxrt/117x/imxrt117x.c

@@ -181,7 +181,7 @@ int _imxrt_setIOpad(int pad, char sre, char dse, char pue, char pus, char ode, c
 	}
 
 	if (((pad >= pctl_pad_gpio_emc_b1_00) && (pad <= pctl_pad_gpio_emc_b2_20)) ||
-			((pad >= pctl_pad_gpio_sd_b1_00) && (pad <= pctl_pad_gpio_disp_b2_15))) {
+			((pad >= pctl_pad_gpio_sd_b1_00) && (pad <= pctl_pad_gpio_disp_b1_11))) {
 		/* Fields have slightly diffrent meaning... */
 		if (pue == 0) {
 			pull = 3;
@@ -200,14 +200,21 @@ int _imxrt_setIOpad(int pad, char sre, char dse, char pue, char pus, char ode, c
 		t = *reg & ~0x1f;
 		t |= (!!sre) | (!!dse << 1) | (!!pue << 2) | (!!pus << 3);
 
-		if ((pad >= pctl_pad_test_mode) && (pad <= pctl_pad_gpio_snvs_09)) {
+		if ((pad >= pctl_pad_gpio_emc_b1_00) && (pad <= pctl_pad_gpio_disp_b2_15)) {
+			t &= ~(1 << 4);
+			t |= !!ode << 4;
+		}
+		else if ((pad >= pctl_pad_wakeup) && (pad <= pctl_pad_gpio_snvs_09)) {
 			t &= ~(1 << 6);
 			t |= !!ode << 6;
 		}
-		else {
+		else if ((pad >= pctl_pad_gpio_lpsr_00) && (pad <= pctl_pad_gpio_lpsr_15)) {
 			t &= ~(1 << 5);
 			t |= !!ode << 5;
 		}
+		else {
+			return -EINVAL;
+		}
 	}
 
 	/* APC field is not documented. Leave it alone for now. */
@@ -235,7 +242,7 @@ static int _imxrt_getIOpad(int pad, char *sre, char *dse, char *pue, char *pus,
 	t = (*reg);
 
 	if (((pad >= pctl_pad_gpio_emc_b1_00) && (pad <= pctl_pad_gpio_emc_b2_20)) ||
-			((pad >= pctl_pad_gpio_sd_b1_00) && (pad <= pctl_pad_gpio_disp_b2_15))) {
+			((pad >= pctl_pad_gpio_sd_b1_00) && (pad <= pctl_pad_gpio_disp_b1_11))) {
 		pull = (t >> 2) & 3;
 
 		if (pull == 3) {
@@ -259,12 +266,18 @@ static int _imxrt_getIOpad(int pad, char *sre, char *dse, char *pue, char *pus,
 		*pue = (t >> 2) & 1;
 		*pus = (t >> 3) & 1;
 
-		if ((pad >= pctl_pad_test_mode) && (pad <= pctl_pad_gpio_snvs_09)) {
+		if ((pad >= pctl_pad_gpio_emc_b1_00) && (pad <= pctl_pad_gpio_disp_b2_15)) {
+			*ode = (t >> 4) & 1;
+		}
+		else if ((pad >= pctl_pad_wakeup) && (pad <= pctl_pad_gpio_snvs_09)) {
 			*ode = (t >> 6) & 1;
 		}
-		else {
+		else if ((pad >= pctl_pad_gpio_lpsr_00) && (pad <= pctl_pad_gpio_lpsr_15)) {
 			*ode = (t >> 5) & 1;
 		}
+		else {
+			return -EINVAL;
+		}
 	}
 
 	*dse = (t >> 1) & 1;