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!tls: move handling to user #598

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81985ac
proc: do not check sizes in not loadable sections
badochov Sep 10, 2024
1932c0f
riscv64/Makefile: disable gp relaxations
badochov Sep 10, 2024
63bd4ac
!tls: move handling to user
badochov Sep 13, 2024
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22 changes: 13 additions & 9 deletions hal/armv7a/cpu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -23,13 +23,11 @@


/* Function creates new cpu context on top of given thread kernel stack */
int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg, hal_tls_t *tls)
int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg)
{
cpu_context_t *ctx;
int i;

(void)tls;

*nctx = 0;
if (kstack == NULL) {
return -1;
Expand Down Expand Up @@ -232,13 +230,19 @@ char *hal_cpuFeatures(char *features, unsigned int len)
}


void hal_cpuTlsSet(hal_tls_t *tls, cpu_context_t *ctx)
void hal_cpuTlsSet(ptr_t tlsPtr, ptr_t tlsReg)
{
(void)tlsReg;

__asm__ volatile("mcr p15, 0, %[value], cr13, cr0, 3;" ::[value] "r"(tlsPtr));
}


void hal_cpuSetCtxTls(cpu_context_t *ctx, ptr_t tlsPtr)
{
/* In theory there should be 8-byte thread control block but
* it's stored elsewhere so we need to subtract 8 from the pointer
*/
ptr_t ptr = tls->tls_base - 8;
__asm__ volatile("mcr p15, 0, %[value], cr13, cr0, 3;" ::[value] "r"(ptr));
/* TLS pointer is not stored in context */
(void)ctx;
(void)tlsPtr;
}


Expand Down
19 changes: 13 additions & 6 deletions hal/armv7m/cpu.c
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Expand Up @@ -81,12 +81,10 @@ void hal_cpuSetDevBusy(int s)
}


int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg, hal_tls_t *tls)
int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg)
{
cpu_context_t *ctx;

(void)tls;

*nctx = 0;
if (kstack == NULL)
return -1;
Expand Down Expand Up @@ -336,8 +334,17 @@ void hal_cpuSmpSync(void)
}


/* Not safe to call if TLS is not present (tls_base mustn't be NULL) */
void hal_cpuTlsSet(hal_tls_t *tls, cpu_context_t *ctx)
void hal_cpuTlsSet(ptr_t tlsPtr, ptr_t tlsReg)
{
if (tlsReg != NULL) {
*(ptr_t *)tlsReg = tlsPtr;
}
}


void hal_cpuSetCtxTls(cpu_context_t *ctx, ptr_t tlsPtr)
{
*(ptr_t *)tls->arm_m_tls = tls->tls_base - 8;
/* TLS pointer is not stored in context */
(void)ctx;
(void)tlsPtr;
}
19 changes: 13 additions & 6 deletions hal/armv8m/cpu.c
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Expand Up @@ -68,12 +68,10 @@ void hal_cpuSetDevBusy(int s)
hal_spinlockClear(&cpu_common.busySp, &scp);
}

int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg, hal_tls_t *tls)
int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg)
{
cpu_context_t *ctx;

(void)tls;

*nctx = 0;
if (kstack == NULL) {
return -1;
Expand Down Expand Up @@ -285,8 +283,17 @@ void hal_cpuSmpSync(void)
}


/* Not safe to call if TLS is not present (tls_base mustn't be NULL) */
void hal_cpuTlsSet(hal_tls_t *tls, cpu_context_t *ctx)
void hal_cpuTlsSet(ptr_t tlsPtr, ptr_t tlsReg)
{
if (tlsReg != NULL) {
*(ptr_t *)tlsReg = tlsPtr;
}
}


void hal_cpuSetCtxTls(cpu_context_t *ctx, ptr_t tlsPtr)
{
*(ptr_t *)tls->arm_m_tls = tls->tls_base - 8;
/* TLS pointer is not stored in context */
(void)ctx;
(void)tlsPtr;
}
22 changes: 13 additions & 9 deletions hal/armv8r/cpu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -25,13 +25,11 @@
extern void _hal_platformInit(void);


int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg, hal_tls_t *tls)
int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg)
{
cpu_context_t *ctx;
int i;

(void)tls;

*nctx = 0;
if (kstack == NULL) {
return -1;
Expand Down Expand Up @@ -232,13 +230,19 @@ char *hal_cpuFeatures(char *features, unsigned int len)
}


void hal_cpuTlsSet(hal_tls_t *tls, cpu_context_t *ctx)
void hal_cpuTlsSet(ptr_t tlsPtr, ptr_t tlsReg)
{
(void)tlsReg;

__asm__ volatile("mcr p15, 0, %[value], cr13, cr0, 3;" ::[value] "r"(tlsPtr));
}


void hal_cpuSetCtxTls(cpu_context_t *ctx, ptr_t tlsPtr)
{
/* In theory there should be 8-byte thread control block but
* it's stored elsewhere so we need to subtract 8 from the pointer
*/
ptr_t ptr = tls->tls_base - 8;
__asm__ volatile("mcr p15, 0, %[value], cr13, cr0, 3;" ::[value] "r"(ptr));
/* TLS pointer is not stored in context */
(void)ctx;
(void)tlsPtr;
}


Expand Down
10 changes: 5 additions & 5 deletions hal/cpu.h
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Expand Up @@ -23,9 +23,6 @@
#include "spinlock.h"


struct _hal_tls_t;


typedef ptr_t arg_t;


Expand Down Expand Up @@ -79,7 +76,7 @@ extern void hal_cpuSetGot(void *got);
extern void *hal_cpuGetGot(void);


extern int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg, struct _hal_tls_t *tls);
extern int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg);


extern int hal_cpuReschedule(struct _spinlock_t *spinlock, spinlock_ctx_t *scp);
Expand Down Expand Up @@ -139,7 +136,10 @@ extern void hal_cpuSmpSync(void);
/* thread local storage */


extern void hal_cpuTlsSet(struct _hal_tls_t *tls, cpu_context_t *ctx);
extern void hal_cpuTlsSet(ptr_t tlsPtr, ptr_t tlsReg);


extern void hal_cpuSetCtxTls(cpu_context_t *ctx, ptr_t tlsPtr);


/* cache management */
Expand Down
9 changes: 0 additions & 9 deletions hal/hal.h
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Expand Up @@ -29,15 +29,6 @@
#include "types.h"


typedef struct _hal_tls_t {
ptr_t tls_base;
ptr_t arm_m_tls;
size_t tdata_sz;
size_t tbss_sz;
size_t tls_sz;
} hal_tls_t;


extern void *hal_syspageRelocate(void *data);


Expand Down
19 changes: 13 additions & 6 deletions hal/ia32/cpu.c
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Expand Up @@ -114,12 +114,10 @@ u32 cpu_getEFLAGS(void)
}


int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg, hal_tls_t *tls)
int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg)
{
cpu_context_t *ctx;

(void)tls;

*nctx = NULL;
if (kstack == NULL) {
return -EINVAL;
Expand Down Expand Up @@ -600,11 +598,20 @@ void _hal_cpuInit(void)
}


void hal_cpuTlsSet(hal_tls_t *tls, cpu_context_t *ctx)
void hal_cpuTlsSet(ptr_t tlsPtr, ptr_t tlsReg)
{
(void)ctx;
(void)tlsReg;

hal_tlbFlushLocal(NULL);
_cpu_gdtInsert(hal_cpuGetTlsIndex(), tls->tls_base + tls->tbss_sz + tls->tdata_sz, VADDR_KERNEL - tls->tls_base + tls->tbss_sz + tls->tdata_sz, DESCR_TLS);
_cpu_gdtInsert(hal_cpuGetTlsIndex(), tlsPtr, VADDR_KERNEL, DESCR_TLS);
/* Reload the hidden gs register*/
hal_cpuReloadTlsSegment();
}


void hal_cpuSetCtxTls(cpu_context_t *ctx, ptr_t tlsPtr)
{
/* TLS pointer is not stored in context */
(void)ctx;
(void)tlsPtr;
}
5 changes: 5 additions & 0 deletions hal/riscv64/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -11,3 +11,8 @@ include hal/$(TARGET_SUFF)/$(TARGET_SUBFAMILY)/Makefile

CFLAGS += -Ihal/$(TARGET_SUFF) -Ihal/$(TARGET_SUFF)/$(TARGET_SUBFAMILY)

# binutils 2.41 silently introduced gp relaxations which for some reason make kernel impossible to build
# TODO: investigate further
ifeq ($(shell expr $(LD_VERSION_MINOR) ">=" 41), 1)
LDFLAGS += $(LDFLAGS_PREFIX)--no-relax-gp
endif
18 changes: 12 additions & 6 deletions hal/riscv64/cpu.c
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Expand Up @@ -116,7 +116,7 @@ unsigned int hal_cpuGetFirstBit(unsigned long v)
/* context management */


int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg, hal_tls_t *tls)
int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg)
{
cpu_context_t *ctx;

Expand Down Expand Up @@ -178,14 +178,14 @@ int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t
ctx->sepc = (u64)start;
ctx->ksp = (u64)ctx;

ctx->tp = 0;

if (ustack != NULL) {
ctx->sp = (u64)ustack;
ctx->sstatus = (csr_read(sstatus) | SSTATUS_SPIE | SSTATUS_SUM) & ~SSTATUS_SPP;
ctx->tp = tls->tls_base;
}
else {
ctx->sstatus = csr_read(sstatus) | SSTATUS_SPIE | SSTATUS_SPP;
ctx->tp = 0;
}

*nctx = ctx;
Expand Down Expand Up @@ -438,9 +438,15 @@ __attribute__((section(".init"))) void _hal_cpuInit(void)
}


void hal_cpuTlsSet(hal_tls_t *tls, cpu_context_t *ctx)
void hal_cpuTlsSet(ptr_t tlsPtr, ptr_t tlsReg)
{
(void)ctx;
/* TLS pointer is set during user state restoration, as it's part of cpu context. */
(void)tlsReg;
(void)tlsPtr;
}

__asm__ volatile("mv tp, %0" ::"r"(tls->tls_base));

void hal_cpuSetCtxTls(cpu_context_t *ctx, ptr_t tlsPtr)
{
ctx->tp = tlsPtr;
}
17 changes: 12 additions & 5 deletions hal/sparcv8leon3/cpu.c
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Expand Up @@ -57,7 +57,7 @@ static const char *hal_cpuGetFpuOption(void)
}


int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg, hal_tls_t *tls)
int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t kstacksz, void *ustack, void *arg)
{
cpu_context_t *ctx;
cpu_winContext_t *wctx;
Expand All @@ -82,7 +82,6 @@ int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t

wctx->fp = (ptr_t)ustack;
ctx->psr = (PSR_S | PSR_ET) & (~PSR_CWP);
ctx->g7 = tls->tls_base + tls->tbss_sz + tls->tdata_sz;
}
else {
ctx = (cpu_context_t *)((ptr_t)kstack + kstacksz - sizeof(cpu_context_t) - sizeof(cpu_winContext_t));
Expand All @@ -93,7 +92,6 @@ int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t
wctx->fp = (ptr_t)kstack + kstacksz;
/* supervisor mode, enable traps, cwp = 0 */
ctx->psr = (PSR_S | PSR_ET | PSR_PS) & (~PSR_CWP);
ctx->g7 = 0x77777777;
}

ctx->o0 = (u32)arg;
Expand Down Expand Up @@ -127,6 +125,7 @@ int hal_cpuCreateContext(cpu_context_t **nctx, void *start, void *kstack, size_t
ctx->g4 = 0x44444444;
ctx->g5 = 0x55555555;
ctx->g6 = 0x66666666;
ctx->g7 = 0x77777777;

ctx->sp = (u32)wctx;
ctx->savesp = (u32)ctx;
Expand Down Expand Up @@ -298,9 +297,17 @@ unsigned int hal_cpuGetFirstBit(unsigned long v)
}


void hal_cpuTlsSet(hal_tls_t *tls, cpu_context_t *ctx)
void hal_cpuTlsSet(ptr_t tlsPtr, ptr_t tlsReg)
{
__asm__ volatile("mov %0, %%g7" ::"r"(tls->tls_base + tls->tbss_sz + tls->tdata_sz));
/* TLS pointer is set during user state restoration, as it's part of cpu context. */
(void)tlsReg;
(void)tlsPtr;
}


void hal_cpuSetCtxTls(cpu_context_t *ctx, ptr_t tlsPtr)
{
ctx->g7 = tlsPtr;
}


Expand Down
38 changes: 38 additions & 0 deletions include/auxv.h
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Original file line number Diff line number Diff line change
@@ -0,0 +1,38 @@
/*
* Phoenix-RTOS
*
* Operating system kernel
*
* Auxiliary vector definitions
*
* Copyright 2024 Phoenix Systems
* Author: Hubert Badocha
*
* This file is part of Phoenix-RTOS.
*
* %LICENSE%
*/

#ifndef _PHOENIX_AUXV_H_
#define _PHOENIX_AUXV_H_


#include "types.h"


struct auxInfo {
__u32 a_type; /* Type of element. */
__u64 a_v; /* Value of element. */
};


#define AT_NULL 0 /* End of auxiliary vector. */
#define AT_PHDR 1 /* Location of program header table. */
#define AT_PHENT 2 /* Size of one entry in program header table. */
#define AT_PHNUM 3 /* Number of entries in program header table. */


#define AUXV_TYPE_COUNT 4 /* Number of auxiliary vector element types. */


#endif
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