hw(pkg): Use port id by default

pulp-platform · Jul 23, 2024 · c159a84 · c159a84
1 parent 2b64436
commit c159a84
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Showing 3 changed files with 9 additions and 5 deletions.
diff --git a/floogen/model/routing.py b/floogen/model/routing.py
@@ -425,7 +425,7 @@ class Routing(BaseModel):
     num_route_bits: Optional[int] = None
     addr_width: Optional[int] = None
     rob_idx_bits: int = 1
-    port_id_bits: int = 0
+    port_id_bits: int = 1
     num_vc_id_bits: int = 0
 
     @field_validator("route_algo", mode="before")

diff --git a/hw/floo_axi_pkg.sv b/hw/floo_axi_pkg.sv
@@ -69,11 +69,13 @@ package floo_axi_pkg;
 
 
   typedef logic [0:0] rob_idx_t;
+  typedef logic [0:0] port_id_t;
   typedef logic [2:0] x_bits_t;
   typedef logic [2:0] y_bits_t;
   typedef struct packed {
-    x_bits_t x;
-    y_bits_t y;
+    x_bits_t  x;
+    y_bits_t  y;
+    port_id_t port_id;
   } id_t;
 
   typedef logic route_t;

diff --git a/hw/floo_narrow_wide_pkg.sv b/hw/floo_narrow_wide_pkg.sv
@@ -107,11 +107,13 @@ package floo_narrow_wide_pkg;
 
 
   typedef logic [0:0] rob_idx_t;
+  typedef logic [0:0] port_id_t;
   typedef logic [2:0] x_bits_t;
   typedef logic [2:0] y_bits_t;
   typedef struct packed {
-    x_bits_t x;
-    y_bits_t y;
+    x_bits_t  x;
+    y_bits_t  y;
+    port_id_t port_id;
   } id_t;
 
   typedef logic route_t;