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make: Use vsim executable by default
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fischeti committed Sep 10, 2024
1 parent 37f7a6c commit e0e0504
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2 changes: 1 addition & 1 deletion Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ clean: clean-sim clean-spyglass clean-jobs clean-sources
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BENDER ?= bender
VSIM ?= questa-2023.4 vsim
VSIM ?= vsim
SPYGLASS ?= sg_shell
VERIBLE_FMT ?= verible-verilog-format

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