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[hardware] WIP vmcompare
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@mp-17
mp-17 committed Nov 15, 2024
1 parent 9a0a719 commit 3c0f74b
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Showing 3 changed files with 14 additions and 10 deletions.
19 changes: 11 additions & 8 deletions hardware/src/ara_dispatcher.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -637,8 +637,9 @@ module ara_dispatcher import ara_pkg::*; import rvv_pkg::*; #(
end
6'b011000: begin
ara_req_d.op = ara_pkg::VMSEQ;
ara_req_d.eew_vs1 = eew_q[ara_req_d.vs2];
ara_req_d.eew_vs2 = eew_q[ara_req_d.vs2];
ara_req_d.use_vd_op = 1'b1;
ara_req_d.eew_vs1 = csr_vtype_q.vsew;
ara_req_d.eew_vs2 = csr_vtype_q.vsew;
ara_req_d.eew_vd_op = eew_q[ara_req_d.vd];
ara_req_d.vtype.vsew = eew_q[ara_req_d.vd];
end
Expand Down Expand Up @@ -864,9 +865,10 @@ module ara_dispatcher import ara_pkg::*; import rvv_pkg::*; #(
endcase
end
6'b011000: begin
ara_req_d.op = ara_pkg::VMSEQ;
ara_req_d.eew_vs1 = eew_q[ara_req_d.vs2];
ara_req_d.eew_vs2 = eew_q[ara_req_d.vs2];
ara_req_d.op = ara_pkg::VMSEQ;
ara_req_d.use_vd_op = 1'b1;
ara_req_d.eew_vs1 = csr_vtype_q.vsew;
ara_req_d.eew_vs2 = csr_vtype_q.vsew;
ara_req_d.eew_vd_op = eew_q[ara_req_d.vd];
ara_req_d.vtype.vsew = eew_q[ara_req_d.vd];
end
Expand Down Expand Up @@ -1038,9 +1040,10 @@ module ara_dispatcher import ara_pkg::*; import rvv_pkg::*; #(
endcase
end
6'b011000: begin
ara_req_d.op = ara_pkg::VMSEQ;
ara_req_d.eew_vs1 = eew_q[ara_req_d.vs2];
ara_req_d.eew_vs2 = eew_q[ara_req_d.vs2];
ara_req_d.op = ara_pkg::VMSEQ;
ara_req_d.use_vd_op = 1'b1;
ara_req_d.eew_vs1 = csr_vtype_q.vsew;
ara_req_d.eew_vs2 = csr_vtype_q.vsew;
ara_req_d.eew_vd_op = eew_q[ara_req_d.vd];
ara_req_d.vtype.vsew = eew_q[ara_req_d.vd];
end
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1 change: 1 addition & 0 deletions hardware/src/lane/lane_sequencer.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -259,6 +259,7 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
vtype : pe_req.vtype,
default : '0
};
vfu_operation_d.vtype.vsew = pe_req.op inside {[VMFEQ:VMSGT]} ? pe_req.eew_vs2 : pe_req.vtype.vsew;
vfu_operation_valid_d = (vfu_operation_d.vfu != VFU_None) ? 1'b1 : 1'b0;

// Vector length calculation
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4 changes: 2 additions & 2 deletions hardware/src/masku/masku.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -1205,15 +1205,15 @@ module masku import ara_pkg::*; import rvv_pkg::*; #(
// Mask to mask - encoded
delta_elm_d = NrLanes << (EW64 - pe_req_i.eew_vs2[1:0]);

in_ready_threshold_d = 1;
in_ready_threshold_d = 0;
in_m_ready_threshold_d = (DataWidth >> (EW64 - pe_req_i.eew_vs2[1:0]))-1;
out_valid_threshold_d = (DataWidth >> (EW64 - pe_req_i.eew_vs2[1:0]))-1;
end
[VMADC:VMSBC]: begin
// Mask to mask - encoded
delta_elm_d = NrLanes << (EW64 - pe_req_i.eew_vs2[1:0]);

in_ready_threshold_d = 1;
in_ready_threshold_d = 0;
in_m_ready_threshold_d = (DataWidth >> (EW64 - pe_req_i.eew_vs2[1:0]))-1;
out_valid_threshold_d = (DataWidth >> (EW64 - pe_req_i.eew_vs2[1:0]))-1;
end
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