clarify Bare translations, if created, dont need explicit invalidations

riscv-non-isa · Aug 15, 2023 · c309044 · c309044
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diff --git a/iommu_in_memory_queues.adoc b/iommu_in_memory_queues.adoc
@@ -270,6 +270,12 @@ match the `GSCID` argument, regardless of the address argument.
 Simpler implementations may ignore the operand of `IOTINVAL.VMA` and/or
 `IOTINVAL.GVMA` and always perform a global invalidation of all
 address-translation entries.
+
+Some implementations may choose to cache an identity-mapped translation when
+both the first-stage and second-stage page tables are in `Bare` mode. The
+`IOTINVAL` commands do not apply to such translations, as they represent
+identity mappings and are therefore always correct. As a result, there is no
+need for explicit invalidation.
 ====
 
 [NOTE]

diff --git a/iommu_sw_guidelines.adoc b/iommu_sw_guidelines.adoc
@@ -149,9 +149,9 @@ device with `device_id = D`) then the following invalidations must be performed:
 ** `IOTINVAL.VMA` with `GV=1`, `AV=PSCV=0`, and `GSCID=DC.iohgatp.GSCID`
 ** `IOTINVAL.GVMA` with `GV=1`, `AV=0`, and `GSCID=DC.iohgatp.GSCID`
 * else
-** If `DC.tc.PDTV==1 || DC.tc.PDTV == 0 && DC.fsc.MODE == Bare`
+** If `DC.tc.PDTV==1`
 *** `IOTINVAL.VMA` with `GV=AV=PSCV=0`
-** else
+** else if `DC.fsc.MODE != Bare`
 *** `IOTINVAL.VMA` with `GV=AV=0` and `PSCV=1`, and `PSCID=DC.ta.PSCID`
 
 If software changes a non-leaf-level DDT entry the following invalidations