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Merge pull request #222 from ved-rivos/Ratified
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Update to ratified state
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ved-rivos authored Jul 3, 2024
2 parents 867a6ca + bd9938c commit c9366c6
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11 changes: 0 additions & 11 deletions src/cfi_backward.adoc
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Expand Up @@ -119,17 +119,6 @@ of as "store/AMO/SS" exceptions, indicating that the trapping instruction is
either a store, an AMO, or a shadow stack instruction.
====

[NOTE]
====
The H (hypervisor) extension specifies that when a guest-page fault is caused by
an implicit memory access of VS-stage address translation, the reported
exception is either a load or store/AMO guest-page fault based not on the
original instruction type but rather on whether the memory access attempted for
VS-stage translation was a read or a write of memory. VS-stage address
translation can thus cause a shadow stack instruction to raise a load
guest-page-fault exception.
====

<<<

=== Zicfiss CSRs
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12 changes: 5 additions & 7 deletions src/riscv-cfi.adoc
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= RISC-V Shadow Stacks and Landing Pads
:description: RISC-V Shadow-stack and Landing-pads Task Group
:company: RISC-V.org
:revdate: 03/2024
:revdate: 06/2024
:revnumber: 1.0
:revremark: This document is in Frozen. See http://riscv.org/spec-state for details.
:revremark: This document is in Ratified. See http://riscv.org/spec-state for details.
:url-riscv: http://riscv.org
:doctype: book
:preface-title: Preamble
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:xrefstyle: short

[WARNING]
.This document is in the link:http://riscv.org/spec-state[Frozen state]
.This document is in the link:http://riscv.org/spec-state[Ratified state]
====
Change is extremely unlikely. A high threshold will be used, and a change will
only occur because of some truly critical issue being identified during the
public review cycle. Any other desired or needed changes can be the subject of a
follow-on new extension.
No changes are allowed. Any desired or needed changes can be the subject of a
follow-on new extension. Ratified extensions are never revised.
====

[preface]
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