Release 2.0 (RV32IMAC_Zicsr_Zifencei)
This release adds:
- Instruction sets configurable with parameters
- Optional writeability to the
misa
CSR - The A (atomic memory operations) extension
- A new external interface for atomics
Because the presence of the A extension requires additional external logic, instead of just some signals that can be ignored, the semver MAJOR number was incremented, resulting in v2.0.
This feature marks the completion of my initial goals and the last instruction set I will implement for the time being.