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[*] minor changes: packages import order has been changed
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sergeykhbr committed Dec 10, 2023
1 parent ac92e5b commit 231ce17
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Showing 2 changed files with 2 additions and 1 deletion.
2 changes: 1 addition & 1 deletion sv/rtl/riscv_soc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -76,12 +76,12 @@ module riscv_soc #(
input types_amba_pkg::axi4_slave_out_type i_ddr_xslvo // AXI DDR memory interface
);

import target_cfg_pkg::*;
import types_amba_pkg::*;
import types_pnp_pkg::*;
import types_bus0_pkg::*;
import types_bus1_pkg::*;
import river_cfg_pkg::*;
import target_cfg_pkg::*;
import riscv_soc_pkg::*;

axi4_master_out_type acpo;
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1 change: 1 addition & 0 deletions sv/rtl/riscv_soc_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@ import types_pnp_pkg::*;
import types_bus0_pkg::*;
import types_bus1_pkg::*;
import river_cfg_pkg::*;
import target_cfg_pkg::*;


// Hardware SoC Identificator.
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