- Software
- Vivado Design Suite 2019.1
- Hardware
- Peripherals
- Open Vivado 2019.1.
- Using the tcl console, type the following:
cd <change to extracted_folder>/<lock or lock_zed>
source ./lock.tcl # if using Zybo, or
source ./lock_zed.tcl # if using ZedBoard
- Create a new HDL wrapper for the block design.
- Run synthesis and implementation, then generate the bitstream.
- Go to File > Export > Export Hardware. Make sure that the "Include Bitstream" box is marked.
- Go to File > Launch SDK.
- Once the SDK is launched, go to File > New > Application Project.
- Fill up the form with the following details:
Field | Value |
---|---|
Project Name | "Your preferred name" |
OS Platform | Standalone |
Hardware Platform | design_1_wrapper_hw_platform_0 |
Processor | ps7_cortex a9_0 |
Language | C |
- Click on Next, select the Empty Application template, then click Finish.
- Copy the contents of
(zybo or zybo_zed)/src
into thesrc
folder under "Project Name". - Under Project Explorer, right-click on the project folder, click on C/C++ Build Settings.
- Under Libraries, click on Add, then type
m
. - Program the FPGA.
- Right-click on the project folder, click on Run As > Launch On Hardware (GDB).
- Guest Mode
- Allows the user up to five times to guess the combination. Corresponding characters and LED patterns are generated based on the current input status.
- Administrator Mode
- A two-stage process that lets the user modify various information:
- Switch change: A switch combination must be applied to the lock in order to move on to the second stage.
- Keypad input: The lock will prompt for the administrator password. Once verified, the user will be able to reset or change the lock/admin combinations.