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enable sync future for CachePadded
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wathenjiang committed Jul 30, 2023
1 parent 91c0108 commit 6d0e481
Showing 1 changed file with 16 additions and 10 deletions.
26 changes: 16 additions & 10 deletions tokio/src/util/cacheline.rs
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@ use std::ops::{Deref, DerefMut};
// - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_ppc64x.go#L9
#[cfg_attr(
any(
test,
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "powerpc64",
Expand All @@ -36,6 +37,7 @@ use std::ops::{Deref, DerefMut};
// - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_riscv64.go#L7
#[cfg_attr(
any(
test,
target_arch = "arm",
target_arch = "mips",
target_arch = "mips64",
Expand All @@ -56,18 +58,22 @@ use std::ops::{Deref, DerefMut};
//
// All others are assumed to have 64-byte cache line size.
#[cfg_attr(
not(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "powerpc64",
target_arch = "arm",
target_arch = "mips",
target_arch = "mips64",
target_arch = "riscv64",
target_arch = "s390x",
)),
any(
test,
not(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "powerpc64",
target_arch = "arm",
target_arch = "mips",
target_arch = "mips64",
target_arch = "riscv64",
target_arch = "s390x",
)),
),
repr(align(64))
)]
#[cfg(any(feature = "sync", feature = "rt-net", test))]
pub(crate) struct CachePadded<T> {
value: T,
}
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