A baremetal experiment of Allwinner D1, without FEL

Sipeed Lichee RV Allwinner D1 RISC-V

YuzukiRulerPro based on Allwinner D1-H RISC-V Processor

GitHub Actions Self-Hosted runner for RISC-V

A Makefile based reimplementation of https://github.com/sehraf/riscv-arch-image-builder

Experimentation with the RT-Thread Operating System with the Allwinner D1H

Yocto Project meta layer that provides early support for a RISC-V based board called Nezha.

Examples of Halide language algorithms running on RISC-V

Make a Debian image for some RISC-V boards

5️⃣ Ascon lightweight cryptographic algorithm implementation for improved performance on riscv64

Elementary HAL for Allwinner D1 SOC.

Examples of Halide language algorithms running on RISC-V

MangoPi-MQ1 Allwinner D1s RISC-V