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zedboard

Here are 78 public repositories matching this topic...

michaelkimmer / zedboard_adrv9002_project

Implementation of an IEEE 802.11p PHY realitime receiver in VHDL on ZedBoard and ADRV9002. Master's thesis at CTU in Prague FEE.

vhdl realtime ieee vivado zedboard viterbi 802-11p vitis adrv9001

Updated Oct 16, 2024
VHDL

WangXuan95 / Zynq-Tutorial

使用 Vivado+PetaLinux 为 Xilinx Zynq7 搭建 Linux 系统 —— 以 Zedboard 为例

zynq vivado zedboard petalinux block-design soc-fpga zynq-7020

Updated Sep 19, 2024

gubbriaco / digital-electronics-projects

Progetti di Elettronica Digitale 2021.

fpga pipeline vhdl xilinx vivado adder zedboard adders carry-look-ahead-adder carry-select-adder

Updated Aug 10, 2024
VHDL

gubbriaco / FPGA-VHDL-Wallace-multiplier

Design and Analysis of an FPGA-based Wallace Multiplier.

fpga excel vhdl xilinx vivado zedboard wallace-tree-multiplier multiplier wallace wallace-method multipliers

Updated Aug 10, 2024
VHDL

riuandg5 / eld-labs

Embedded Logic Design Labs

xilinx xpm zedboard xilinx-vivado xilinx-sdk embedded-logic-design zybo-z7-10

Updated Jul 15, 2024
Tcl

rockyhuiop / CENG3430-AirFighter

2 Players Airplane Battle Arcade game on Zynq, using FPGA Zedboard to output VGA signal to display on 1024*600 monitor

fpga zynq vhdl arcade zedboard vhdl-coursework vhdl-game

Updated May 29, 2024
VHDL

ddurfeeEngineer / ad9361-iiostream-loopback

example of using iio to stream data from AD9361 with a coax cable loopback

zynq xilinx sdr iio zed analog-devices zedboard ad9361 xilinx-zynq vitis

Updated Apr 14, 2024
C

zyx1121 / zedboard-ubuntu

Ubuntu on the ZedBoard

Updated Mar 28, 2024

dwij2812 / UART-Spectrum-Analyzer-for-Serial-Devices

The following Script can be used to generate certain mathematical functions on a micro controller or FPGA Device connected in serial based on the configuration selected by the the user and collect realtime data of the signal as generated by the device for spectrum analysis.

spectrum numpy python3 matplotlib zedboard xilinx-vivado xilinx-zynq mplcursors

Updated Oct 30, 2024
VHDL

lvgl / lv_port_xilinx_zedboard_vitis

This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals

embedded usb tcp amd mouse freertos ntp xilinx vivado touchscreen zedboard vga digilent lvgl vitis

Updated Oct 12, 2023
C

exarchou / ZedBoard_Zynq_Embedded_System

Custom AXI IPs and driving of GPIOs with a ZYNQ-7000 on a ZedBoard

fpga vhdl xilinx vivado zedboard software-development-kit zynq-7000

Updated Jun 18, 2023
VHDL

r0tary / FPGA-Audio-Visualizer

An audio visualizer implemented on a Zedboard FPGA, that takes in audio and outputs it on a VGA supported monitor

audio fpga dft vhdl audio-visualizer zedboard vga zynq-7000

Updated May 30, 2023
VHDL

ArthyD / VHDLProjects

My VHDL academic projects including cryptography accelerators, a RISC-V processor implementation

cryptography vhdl zedboard risc-v

Updated Mar 18, 2023
VHDL

gubbriaco / VHDL_scripts

Useful VHDL scripts for hardware description.

fpga vhdl xilinx vivado adder zedboard multiplier adders full-adder kogge-stone-adder pynq-z2 multipliers pynq-platform ripple-carry-adder carry-save-adder kogge-stone

Updated Jan 29, 2023
VHDL

bperez77 / xilinx_axidma

A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.

fpga driver xilinx zedboard axi-dma linux-driver axi-vdma dma-driver xilinx-axi-dma xilinx-axi-vdma userspace-dma fpga-dma

Updated Jan 12, 2023
C

wiwinhartini / spwm_fpga

Time shifted PWM on FPGA. for my MS thesis

verilog zedboard pwm-driver power-electronics spwm

Updated Oct 23, 2022
Verilog

BondMachineHQ / bondmachine_zedboard_buildroot_example

Buildroot on Zedboard. How to create from scratch a complete BondMachine accelerated buildroot image for the Zedboard

fpga howto buildroot zedboard bondmachine

Updated Feb 24, 2022
Verilog

takatz28 / Digital-Lock-System

Final project for the class "System-on-Chip Design"

c vhdl verilog zedboard system-on-chip zybo-z7

Updated Nov 9, 2021
VHDL

mohammadasim98 / Petalinux-Zedboard-Project

Petalinux project integrating Xilinx DPU v3.0 for Avnet Zedboard Zynq-7000 SoC

zedboard petalinux zynq-7000 dpu

Updated Sep 2, 2021
Python

ilaydayaman / Bachelor_Thesis

Implementation of Nist Tests on a Chaotic Random Number Generator Inside a System on Chip (Zynq®-7000 All Programmable SoC)

random-number-generators zedboard embedded-linux

Updated Aug 20, 2021

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