feat: add trace width #101
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| @@ -52,7 +52,6 @@ export class NetBuilderClass implements NetBuilder { | |||
| is_digital_signal: this.props.is_digital_signal, | |||
| is_power: this.props.is_power, | |||
| is_ground: this.props.is_ground, | |||
| trace_width: this.props.trace_width, | |||
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nets should also have a trace width!
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basically there's a priority system, net comes last in priorities
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this is so you can say "the 5V net should generally have this traceWidth, but this hint should override that because this point gets hot..."
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Oops, yeah! this was giving type error and to fix that I removed it for a while. I think because of some version mismatch. I will add this back
| @@ -113,6 +106,7 @@ class TraceHintBuilderClass { | |||
| pcb_port_id: pcb_port.pcb_port_id, | |||
| pcb_component_id: pcb_port.pcb_component_id, | |||
| route, | |||
| trace_width: this.props.traceWidth ?? 0.1, | |||
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we shouldn't give trace hints a default width
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(because we want to have the priority system- if a trace hint width isn't defined then we'll use the default for the net, or the pad type etc.)
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@seveibar What is the difference between the net and pad type? And how are they coming into the picture while we are manually adding trace hint?
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Yea good question, a "net" is really generally, like "the 5v net" usually refers to any connection that makes contact with a 5v line. Usually that's going to be like every chip that has power. Lowest priority for trace width
Then there's a trace, which refers to the full set of lines/route that connect two or more pads together.
Then theres a "tracehint point" which refers to a single point along a tracehint. Each of these points can individually have an associated width.
Will draw up a diagram in a moment
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Is trace only between the chip and power? then for ex. what are those between two resistors or a chip and resistor?
We use these trace_hints to make a optimised trace and optimised width usage for trace?
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generally you don't need to vary the trace width for non-power traces, but a circuit will often have 2-5 different traces that represent some kind of power at different voltage levels or "noise levels"
Not every trace will have an explicitly defined net too. If you don't have an explicit net then you just use the "board's default trace width". An explicit net is a net that's actually written in the code. Most nets are not explicit, they're created "on the fly" or "as needed"
A trace that isn't connected to power is generally called a "signal trace" because it carries either data or a signal related to data.
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The type and build check is failing, so do I need to add the latest version of the soup and props to make these pass or it should be handled automatically? @seveibar |
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@imrishabh18 yep you should add them manually to get the PR to pass |
Closes - tscircuit/tscircuit#264
@tscircuit/props