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add hack allowing missing start_pcb_port_ids and end_pcb_port_ids to not break overlap testing when a trace only contains two ports #10

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add hack allowing missing start_pcb_port_ids and end_pcb_port_ids to not break overlap testing when a trace only contains two ports

add hack allowing missing start_pcb_port_ids and end_pcb_port_ids to not break overlap testing when a trace only contains two ports #10

Triggered via pull request July 24, 2024 20:31
@seveibarseveibar
opened #5
hack
Status Failure
Total duration 18s
Artifacts –

bun-test.yml

on: pull_request
test
7s
test
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2 errors and 2 warnings
error: expect(received).toHaveLength(expected): tests/lib/check-each-pcb-trace-non-overlapping/overlapping-bug-traces2.test.ts#L10
Expected length: 4 Received length: 1 at /home/runner/work/checks/checks/tests/lib/check-each-pcb-trace-non-overlapping/overlapping-bug-traces2.test.ts:10:51
test
Process completed with exit code 1.
test
The following actions uses node12 which is deprecated and will be forced to run on node16: actions/checkout@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/
test
The following actions uses Node.js version which is deprecated and will be forced to run on node20: actions/checkout@v2. For more info: https://github.blog/changelog/2024-03-07-github-actions-all-actions-will-run-on-node20-instead-of-node16-by-default/