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Merge pull request #165 from tscircuit/trace-layer-fix
trace layer fix for explicitly defined smtpads
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13 changes: 13 additions & 0 deletions
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tests/components/normal-components/__snapshots__/chip-layer-trace-bug-pcb.snap.svg
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69 changes: 69 additions & 0 deletions
69
tests/components/normal-components/chip-layer-trace-bug.test.tsx
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Original file line number | Diff line number | Diff line change |
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import { test, expect } from "bun:test" | ||
import { getTestFixture } from "tests/fixtures/get-test-fixture" | ||
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const FlippedChip = ({ | ||
name, | ||
...props | ||
}: { name: string; [key: string]: any }) => ( | ||
<group> | ||
<chip {...props} name={name} layer="bottom" /> | ||
</group> | ||
) | ||
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test("chip with flipped layer should have traces on correct layer", async () => { | ||
const { circuit } = getTestFixture() | ||
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circuit.add( | ||
<board width="20mm" height="20mm"> | ||
<FlippedChip | ||
name="U1" | ||
footprint={ | ||
<footprint> | ||
<smtpad | ||
shape="rect" | ||
width="1mm" | ||
height="1mm" | ||
pcbX={-2} | ||
pcbY={0} | ||
portHints={["1"]} | ||
/> | ||
<smtpad | ||
shape="rect" | ||
width="1mm" | ||
height="1mm" | ||
pcbX={2} | ||
pcbY={0} | ||
portHints={["2"]} | ||
/> | ||
</footprint> | ||
} | ||
pcbX={0} | ||
pcbY={0} | ||
/> | ||
<resistor | ||
name="R1" | ||
resistance="10k" | ||
footprint="0402" | ||
pcbX={-5} | ||
pcbY={0} | ||
/> | ||
<trace from=".R1 > .pin2" to=".U1 > .1" /> | ||
</board>, | ||
) | ||
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circuit.render() | ||
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const traces = circuit.db.pcb_trace.list() | ||
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const routeLayers = traces[0].route.flatMap((point) => { | ||
if ("layer" in point) { | ||
return [point.layer] | ||
} | ||
return [point.to_layer, point.from_layer] | ||
}) | ||
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expect(circuit).toMatchPcbSnapshot(import.meta.path) | ||
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expect(routeLayers).toContain("bottom") | ||
expect(routeLayers).toContain("top") | ||
}) |