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17 Open 11 Closed
17 Open 11 Closed
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Issues list

Chisel 7 Bump Issue due to Default Layers
#84 opened Aug 21, 2024 by seldridge
1
How to include in my own projects?
#77 opened May 1, 2023 by Nerotos
2
"Recoded Format" table in README.md is incorrect
#74 opened Mar 9, 2023 by aamartin0000
sbt test fail
#62 opened May 24, 2022 by pxs7
1
How to compile it to verilog!
#59 opened Dec 11, 2020 by myjtag
1
Is Recoded Format more hardware-friendly for denormal numbers than IEEE754 format?
#57 opened Oct 27, 2020 by hyf6661669
The algorithm used in DivSqrtRecF64_mulAddZ31 to calculate square-root
#55 opened Sep 29, 2020 by zk000888
1
Recoded format
#47 opened Jun 10, 2020 by leahyao
3
make error
#39 opened Dec 17, 2019 by shiruizhao
Mult for Mantissa
#35 opened Oct 4, 2019 by IAMAl
1
Can you provide a detailed explanation of floating point division? The code is too hard to read.
#33 opened Jun 10, 2019 by zcy188
2
Printing value
#26 opened Aug 29, 2018 by apaj
Recode format
#24 opened Jan 3, 2018 by sally-aha
Division/sqrt algorithm
#23 opened Dec 26, 2017 by sally-aha
8
how to use DivSqrtRecFN_small.scala
#19 opened Oct 13, 2017 by Foutse
1
verilog simulator
#13 opened Mar 3, 2017 by ivanratkovic
1
MulAddRecFN infinite loops in Chisel elaboration if called with the wrong inputs (expWidth, sigWidth)
#7 opened Feb 2, 2016 by ccelio
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