soc: st: stm32: Add serie stm32u0

Add STM32U0 familly support

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <[email protected]>

soc/st/stm32/soc.yml

@@ -177,6 +177,9 @@ family:
   - name: stm32mp1x
     socs:
     - name: stm32mp157cxx
+  - name: stm32u0x
+    socs:
+    - name: stm32u083xx
   - name: stm32u5x
     socs:
     - name: stm32u5a5xx

soc/st/stm32/stm32u0x/CMakeLists.txt

@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_include_directories(${ZEPHYR_BASE}/drivers)
+zephyr_sources(
+  soc.c
+  )
+
+zephyr_include_directories(.)
+
+set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

soc/st/stm32/stm32u0x/Kconfig

@@ -0,0 +1,12 @@
+# ST Microelectronics STM32U0 MCU series
+
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_STM32U0X
+	select ARM
+	select CPU_CORTEX_M0PLUS
+	select CPU_HAS_ARM_MPU
+	select CPU_CORTEX_M_HAS_VTOR
+	select HAS_STM32CUBE
+	select CPU_CORTEX_M_HAS_SYSTICK

soc/st/stm32/stm32u0x/Kconfig.defconfig

@@ -0,0 +1,10 @@
+# ST Microelectronics STM32U0 MCU line
+
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_STM32U0X
+
+rsource "Kconfig.defconfig.stm32u0*"
+
+endif # SOC_SERIES_STM32U0X

soc/st/stm32/stm32u0x/Kconfig.defconfig.stm32u083xx

@@ -0,0 +1,11 @@
+# STMicroelectronics STM32U083XX MCU
+
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_STM32U083XX
+
+config NUM_IRQS
+	default 32
+
+endif # SOC_STM32U083XX

soc/st/stm32/stm32u0x/Kconfig.soc

@@ -0,0 +1,18 @@
+# ST Microelectronics STM32U0 MCU line
+
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_STM32U0X
+	bool
+	select SOC_FAMILY_STM32
+
+config SOC_SERIES
+	default "stm32u0x" if SOC_SERIES_STM32U0X
+
+config SOC_STM32U083XX
+	bool
+	select SOC_SERIES_STM32U0X
+
+config SOC
+	default "stm32u083xx" if SOC_STM32U083XX

soc/st/stm32/stm32u0x/soc.c

@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2024 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief System/hardware module for STM32U0 processor
+ */
+
+#include <zephyr/device.h>
+#include <zephyr/init.h>
+#include <stm32_ll_bus.h>
+#include <stm32_ll_pwr.h>
+#include <stm32_ll_icache.h>
+#include <zephyr/logging/log.h>
+
+#include <cmsis_core.h>
+#include <stm32_ll_system.h>
+
+#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
+LOG_MODULE_REGISTER(soc);
+
+/**
+ * @brief Perform basic hardware initialization at boot.
+ *
+ * This needs to be run from the very beginning.
+ * So the init priority has to be 0 (zero).
+ *
+ * @return 0
+ */
+static int stm32u0_init(void)
+{
+	/* Enable ART Accelerator prefetch */
+	LL_FLASH_EnablePrefetch();
+
+	/* Update CMSIS SystemCoreClock variable (HCLK) */
+	/* At reset, system core clock is set to 16 MHz from HSI */
+	SystemCoreClock = 16000000;
+
+	LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
+
+	return 0;
+}
+
+SYS_INIT(stm32u0_init, PRE_KERNEL_1, 0);

soc/st/stm32/stm32u0x/soc.h

@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2024 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file SoC configuration macros for the STM32U0 family processors.
+ *
+ */
+
+
+#ifndef _STM32U0_SOC_H_
+#define _STM32U0_SOC_H_
+
+#ifndef _ASMLANGUAGE
+
+#include <stm32u0xx.h>
+
+#endif /* !_ASMLANGUAGE */
+
+#endif /* _STM32U0_SOC_H_ */