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board: riscv: litex_vexriscv: add flash XIP support #61640

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@josuah josuah commented Aug 18, 2023

Add support for XIP in the LiteX VexRiscv.

This goes along with adding the --with-spi-flash to the make.py script from https://github.com/litex-hub/zephyr-on-litex-vexriscv

$ cd ~/zephyr-on-litex-vexriscv
$ ./make.py --board=lattice_crosslink_nx_evn --build --toolchain=oxide --csr-json=csr.json --with-spi-flash $ litex_json2dts_zephyr --dts=overlay.dts --config=overlay.config csr.json $ cd ~/zephyr-workspace/zephyr
$ xargs <overlay.config west build -p -b litex_vexriscv zephyr/samples/subsys/shell/shell_module -- -DDTC_OVERLAY_FILE="$PWD/overlay.dts"

This requires several LiteX pull requests to be merged first:
litex-hub/zephyr-on-litex-vexriscv#13
enjoy-digital/litex#1748

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Hello @josuah, and thank you very much for your first pull request to the Zephyr project!

A project maintainer just triggered our CI pipeline to run it against your PR and ensure it's compliant and doesn't cause any issues. You might want to take this opportunity to review the project's Contributor Expectations and make any updates to your pull request if necessary. 😊

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josuah commented Aug 18, 2023

Before:

$ xargs <overlay.config west build -p -b litex_vexriscv zephyr/samples/subsys/shell/shell_module -- -DDTC_OVERLAY_FILE="$PWD/overlay.dts"
[...]
/usr/lib/gcc/riscv-none-elf/13.1.0/../../../../riscv-none-elf/bin/ld.bfd: zephyr/zephyr_pre0.elf section `text' will not fit in region `RAM'
/usr/lib/gcc/riscv-none-elf/13.1.0/../../../../riscv-none-elf/bin/ld.bfd: region `RAM' overflowed by 40700 bytes
[...]

After:

$ xargs <overlay.config west build -p -b litex_vexriscv zephyr/samples/subsys/shell/shell_module -- -DDTC_OVERLAY_FILE="$PWD/overlay.dts"
[...]
[165/165] Linking C executable zephyr/zephyr.elf
/usr/lib/gcc/riscv-none-elf/13.1.0/../../../../riscv-none-elf/bin/ld.bfd: warning: zephyr/zephyr.elf has a LOAD segment with RWX permissions
Memory region         Used Size  Region Size  %age Used
             ROM:       89536 B        16 MB      0.53%
             RAM:       17164 B        64 KB     26.19%
        IDT_LIST:          0 GB         2 KB      0.00%
(zephyr-3.11) lap1$

@josuah josuah marked this pull request as draft August 18, 2023 17:51
@josuah josuah changed the title [WIP] board: riscv: litex_vexriscv: add flash XIP support board: riscv: litex_vexriscv: add flash XIP support Aug 18, 2023
Add support for XIP in the LiteX VexRiscv.

This goes along with adding the `--with-spi-flash` to the `make.py`
script from https://github.com/litex-hub/zephyr-on-litex-vexriscv

$ cd ~/zephyr-on-litex-vexriscv
$ ./make.py --board=lattice_crosslink_nx_evn --build --toolchain=oxide --csr-json=csr.json --with-spi-flash
$ litex_json2dts_zephyr --dts=overlay.dts --config=overlay.config csr.json
$ cd ~/zephyr-workspace/zephyr
$ xargs <overlay.config west build -p -b litex_vexriscv zephyr/samples/subsys/shell/shell_module -- -DDTC_OVERLAY_FILE="$PWD/overlay.dts"

This requires several LiteX pull requests to be merged first.

Signed-off-by: Josuah Demangeon <[email protected]>
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josuah commented Sep 14, 2023

This is possible to be done without upstream support Zephyr-side, and possibly even more convenient this way:
enjoy-digital/litex#1748 (comment)

@josuah josuah closed this Sep 14, 2023
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3 participants