Fix: RISC-V vs ENABLE_DEBUG=1 #1668
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…bled correctly when giving various combinations of `ENABLE_DEBUG=1` and `ENABLE_RISCV=1`
dragonmux
added
Bug
…we don't pull it in when the RISC-V support is not enabled
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Detailed description
This PR fixes a bug pointed out to us by ALTracer on Discord where passing ENABLE_DEBUG=1 for the firwmare without also passing ENABLE_RISCV=1 would result in a broken build due to missing preprocessor logic in jtag_devs.c
Your checklist for this pull request
make PROBE_HOST=native)make PROBE_HOST=hosted)Closing issues