WIP sail header

Signed-off-by: Avimitin <[email protected]>
chipsalliance · Oct 8, 2024 · 8b5b827 · 8b5b827
1 parent bff6ba2
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diff --git a/.gitignore b/.gitignore
@@ -1,5 +1,6 @@
 .bloop
 .metals/
+.ccls-cache
 .vscode/
 .bsp/
 .idea/

diff --git a/sail-riscv/include/sail-riscv/generated.h b/sail-riscv/include/sail-riscv/generated.h
@@ -0,0 +1,15 @@
+#include <sail.h>
+#include <stdint.h>
+
+typedef uint64_t mach_bits;
+
+struct zMisa {
+  mach_bits zMisa_chunk_0;
+};
+
+extern struct zMisa zmisa;
+
+// init riscv-sail model
+unit zinit_model(unit);
+bool zstep(sail_int);
+unit ztick_clock(unit);
diff --git a/sail-riscv/include/sail/generated.h b/sail-riscv/include/sail/generated.h
@@ -0,0 +1,5 @@
+// Functions generated from sail
+
+// init sail model
+void model_init(void);
+void model_fini(void);
diff --git a/sail-riscv/todo.md b/sail-riscv/todo.md
@@ -0,0 +1 @@
+- [ ] load_elf: (define in sail, replace with our impl)