MCU Info Page: STM32L452xE
The STM32L452xE (and the NUCLEO_L452RE_P, its Mbed dev board) is a capable midrange chip in the STM32L4 family. It is quite similar to its more popular cousin, the STM32L433, but features more than double the RAM and flash memory, so it's good for projects designed for that chip that outgrow the available space.
| CPU | Flash/Code Memory | RAM | Communication Peripherals | Other Features |
|---|---|---|---|---|
| Cortex-M4F, clocked at up to 80 MHz |
Total: 512 kiB Available to user:* 476.4 kiB |
Total: 128 kiB (SRAM1) + 32 kiB (SRAM2) Available to user:* 117.4kiB Note: SRAM2 is currently not usable by Mbed OS |
|
|
*"Available to user" subtracts both regions of memory unusable by Mbed OS projects and the baseline memory used by a minimal build of Mbed OS.
Mbed OS provides four different clocking options for producing the main (core) clock that the chip will use:
| Option Name | Description |
|---|---|
USE_PLL_HSE_EXTC |
This option uses an 8MHz* external oscillator connected to the OSC_IN pin. The external clock signal can be either a square wave or a clipped sine wave, but must have a logic level signal with the same voltage as the chip's VDD (see datasheet section 6.3.7 for details). |
USE_PLL_HSE_XTAL |
This is similar to the above but expects an 8MHz* crystal on OSC_IN and OSC_OUT. See Page 132 of the datasheet for details. |
USE_PLL_HSI |
This option uses the internal 16MHz (+-2%) HSI oscillator to generate clock. This is accurate enough for a lot of applications and does not require any external components at all. |
USE_PLL_MSI |
This option uses the internal 48MHz (+-8%) MSI oscillator to generate clock. While this oscillator is less accurate by itself, it has the ability to automatically synchronize itself to the low speed (RTC) clock, allowing it to be much more accurate. If you already have a low-speed oscillator connected, using the MSI is the simplest way to have an accurate core clock. |
All of these options result in 80 MHz for SYSCLK, HCLK, PCLK1, and PCLK2.
To configure which clock option you want to use, you will need to configure the "target.clock_source" option in your mbed_app.json file. For example, to select the HSI oscillator, you could use:
{
"target_overrides": {
"STM32L452xE": {
"target.clock_source": "USE_PLL_HSI"
}
}
}*The L452RE can accept any input clock from 4-48MHz, but Mbed OS currently hardcodes the configuration for 8MHz. Want to change this? You will first need to create a custom target that replaces the builtin NUCLEO_L452RE_P target and includes its own version of the system_clock.c file. Then, you will need to change the PLL configuration here so that the PLL outputs 80MHz with your input clock. Finally, you must define the macro HSE_VALUE to your new external clock frequency (e.g. by putting "macros_add": ["HSE_VALUE=16000000"] in your custom target).
By default, Mbed OS assumes that a 32.768kHz crystal is connected to the OSC32_IN and OSC32_OUT pins, and uses this crystal to drive the RTC as well as some peripherals that are active in sleep mode such as the low-power timer. In your design, it might make sense to get rid of this crystal if you're not making active use of the RTC. If you do, make sure to set the option "target.lse_available": 0 in json, which will use the internal 32.7kHz +-10% oscillator instead.
WARNING: If you don't connect the low-speed crystal and don't set this option, your device will fail to boot with a "SetSysClock failed" error!
Mbed uses the 32-bit timer (TIM2) to drive the us ticker, meaning that it and its PWMs are unavailable for applications to use.
The 64 pin package of this processor comes in two variants, the -P version (with SMPS [Switched Mode Power Supply] support) and the regular one without this feature. These versions are nearly identical from a software perspective, except that two IO pins, PC_5 and PD_2, are unavailable on the -P package. Since the Nucleo dev board uses the -P package, these pins are not available in the Mbed OS headers for the MCU. If you are using the non-P version and have a dire need for them, you could generate your own pin name headers (instructions here) and create a custom target with them.
STM32L4 family devices have a fairly limited number of SPI SCLK frequencies available. SCLK can only be created by dividing the core clock (usually 80 or 120 MHz for this family) by a power of 2 (e.g. divide by 2, 4... 256). This means that the minimum possible frequency is 80MHz / 256 = 325kHz. If you need to run SPI at slow frequencies, you might need to use a different chip!